При первичной инициализации чипсета задается базовый адрес (например 500h). Все остальные порты получаются как сложение базового адреса и номера порта. Например 501h, 502h и так далее.
Базовый адрес портов ввода/вывода SMBus указывается в конфигурационном регистре SMB_BASE (обычно регистр по смещению 20h) контроллера SMBus (обычно в составе южного моста).
12 Окт 2010 - 09:52 BIOS71-dada
"Базовый адрес портов ввода/вывода SMBus указывается ..." - или смотрится в ACPI таблицах
One more example:
Asrock P4i65gv, AMIBIOS, Intel i865
BOOTBLK:56B1 ; =============== S U B R O U T I N E =======================================
BOOTBLK:56B1
BOOTBLK:56B1
BOOTBLK:56B1 SMBus_WriteBlock proc near ; CODE XREF: sub_F54A6+93j
BOOTBLK:56B1 ; sub_F54A6+C0j ...
BOOTBLK:56B1 66 0F CF bswap edi ; Swap bytes
BOOTBLK:56B4 66 C1 C0 10 rol eax, 10h ; Rotate Left
BOOTBLK:56B8 B9 B8 0B mov cx, 0BB8h
BOOTBLK:56B8
BOOTBLK:56BB
BOOTBLK:56BB write_loop: ; CODE XREF: SMBus_WriteBlock+23j
BOOTBLK:56BB B8 FF 00 mov ax, 0FFh ; value
BOOTBLK:56BE BF C4 56 mov di, offset SMB_Read_Host_Status
BOOTBLK:56C1 E9 C2 00 jmp SMBus_io_write_SL ; set SMB Host Status
BOOTBLK:56C1
BOOTBLK:56C4 ; ---------------------------------------------------------------------------
BOOTBLK:56C4
BOOTBLK:56C4 SMB_Read_Host_Status: ; DATA XREF: SMBus_WriteBlock+Do
BOOTBLK:56C4 E6 ED out 0EDh, al ; delay
BOOTBLK:56C6 B4 00 mov ah, 0 ; reg
BOOTBLK:56C8 BF CE 56 mov di, offset SMB_Check_Host_Status
BOOTBLK:56CB E9 C0 00 jmp SMBus_io_read_SL ; set SMB_Host_Status
BOOTBLK:56CB
BOOTBLK:56CE ; ---------------------------------------------------------------------------
BOOTBLK:56CE
BOOTBLK:56CE SMB_Check_Host_Status: ; DATA XREF: SMBus_WriteBlock+17o
BOOTBLK:56CE 24 0F and al, 1111b ; Logical AND
BOOTBLK:56D0 3C 00 cmp al, 0 ; No SMB errors
BOOTBLK:56D2 74 0C jz short SMBus_WriteByte ; Jump if Zero (ZF=1)
BOOTBLK:56D2
BOOTBLK:56D4 E2 E5 loop write_loop ; Loop while CX != 0
BOOTBLK:56D4
BOOTBLK:56D6 66 C1 C8 10 ror eax, 10h ; Rotate Right
BOOTBLK:56DA 66 0F CF bswap edi ; Swap bytes
BOOTBLK:56DD F9 stc ; Set Carry Flag
BOOTBLK:56DE FF E7 jmp di ; Indirect Near Jump
BOOTBLK:56DE
BOOTBLK:56DE SMBus_WriteBlock endp
BOOTBLK:56DE
BOOTBLK:56E0
BOOTBLK:56E0 ; =============== S U B R O U T I N E =======================================
BOOTBLK:56E0
BOOTBLK:56E0
BOOTBLK:56E0 SMBus_WriteByte proc near ; CODE XREF: SMBus_WriteBlock+21j
BOOTBLK:56E0 B8 D2 04 mov ax, 4D2h ; reg = 0x4; // XMIT_SLVA - Transmit Slave Address
BOOTBLK:56E0 ; value = 0xD2;
BOOTBLK:56E3 BF E9 56 mov di, offset SMB_Send_CMD
BOOTBLK:56E6 E9 9D 00 jmp SMBus_io_write_SL ; Jump
BOOTBLK:56E6
BOOTBLK:56E9 ; ---------------------------------------------------------------------------
BOOTBLK:56E9
BOOTBLK:56E9 SMB_Send_CMD: ; DATA XREF: SMBus_WriteByte+3o
BOOTBLK:56E9 66 C1 C0 08 rol eax, 8 ; Rotate Left
BOOTBLK:56ED 0C 80 or al, 80h ; value
BOOTBLK:56EF B4 03 mov ah, 3 ; reg = 0x3; // HST_CMD - Host Command
BOOTBLK:56F1 BF F7 56 mov di, offset SMB_Send_Data
BOOTBLK:56F4 E9 8F 00 jmp SMBus_io_write_SL ; Jump
BOOTBLK:56F4
BOOTBLK:56F7 ; ---------------------------------------------------------------------------
BOOTBLK:56F7
BOOTBLK:56F7 SMB_Send_Data: ; DATA XREF: SMBus_WriteByte+11o
BOOTBLK:56F7 66 C1 C0 08 rol eax, 8 ; value
BOOTBLK:56FB B4 05 mov ah, 5 ; reg = 0x5; // HST_D0 - Host Data 0
BOOTBLK:56FD BF 03 57 mov di, offset SMB_Prepare_Controller
BOOTBLK:5700 E9 83 00 jmp SMBus_io_write_SL ; Jump
BOOTBLK:5700
BOOTBLK:5703 ; ---------------------------------------------------------------------------
BOOTBLK:5703
BOOTBLK:5703 SMB_Prepare_Controller: ; DATA XREF: SMBus_WriteByte+1Do
BOOTBLK:5703 B8 48 02 mov ax, 248h ; reg = 0x2; // HST_CNT - Host Control
BOOTBLK:5703 ; value = 0x48;
BOOTBLK:5706 BF 0B 57 mov di, offset loc_F570B
BOOTBLK:5709 EB 7B jmp short SMBus_io_write_SL ; Jump
BOOTBLK:5709
BOOTBLK:570B ; ---------------------------------------------------------------------------
BOOTBLK:570B
BOOTBLK:570B loc_F570B: ; DATA XREF: SMBus_WriteByte+26o
BOOTBLK:570B B9 10 27 mov cx, 2710h
BOOTBLK:570B
BOOTBLK:570E
BOOTBLK:570E delay_loop: ; CODE XREF: SMBus_WriteByte+30j
BOOTBLK:570E E6 ED out 0EDh, al
BOOTBLK:5710 E2 FC loop delay_loop ; Loop while CX != 0
BOOTBLK:5710
BOOTBLK:5712 B8 FF 00 mov ax, 0FFh ; value
BOOTBLK:5715 BF 1A 57 mov di, offset return
BOOTBLK:5718 EB 6C jmp short SMBus_io_write_SL ; Jump
BOOTBLK:5718
BOOTBLK:571A ; ---------------------------------------------------------------------------
BOOTBLK:571A
BOOTBLK:571A return: ; DATA XREF: SMBus_WriteByte+35o
BOOTBLK:571A 66 0F CF bswap edi ; Swap bytes
BOOTBLK:571D F8 clc ; Clear Carry Flag
BOOTBLK:571E FF E7 jmp di ; Indirect Near Jump
BOOTBLK:571E
BOOTBLK:571E SMBus_WriteByte endp
BOOTBLK:571E
BOOTBLK:5720
BOOTBLK:5720 ; =============== S U B R O U T I N E =======================================
BOOTBLK:5720
BOOTBLK:5720
BOOTBLK:5720 SMBus_ReadBlock proc near ; CODE XREF: sub_F54A6+ACj
BOOTBLK:5720 66 0F CF bswap edi ; Swap bytes
BOOTBLK:5723 66 C1 C0 10 rol eax, 10h ; Rotate Left
BOOTBLK:5727 B9 B8 0B mov cx, 0BB8h
BOOTBLK:5727
BOOTBLK:572A
BOOTBLK:572A read_loop: ; CODE XREF: SMBus_ReadBlock+21j
BOOTBLK:572A B8 FF 00 mov ax, 0FFh
BOOTBLK:572D BF 32 57 mov di, offset SMB_Read_Host_Status
BOOTBLK:5730 EB 54 jmp short SMBus_io_write_SL ; Jump
BOOTBLK:5730
BOOTBLK:5732 ; ---------------------------------------------------------------------------
BOOTBLK:5732
BOOTBLK:5732 SMB_Read_Host_Status: ; DATA XREF: SMBus_ReadBlock+Do
BOOTBLK:5732 E6 ED out 0EDh, al
BOOTBLK:5734 B4 00 mov ah, 0
BOOTBLK:5736 BF 3B 57 mov di, offset SMB_Check_Host_Status
BOOTBLK:5739 EB 53 jmp short SMBus_io_read_SL ; Jump
BOOTBLK:5739
BOOTBLK:573B ; ---------------------------------------------------------------------------
BOOTBLK:573B
BOOTBLK:573B SMB_Check_Host_Status: ; DATA XREF: SMBus_ReadBlock+16o
BOOTBLK:573B 24 0F and al, 0Fh ; Logical AND
BOOTBLK:573D 3C 00 cmp al, 0 ; Compare Two Operands
BOOTBLK:573F 74 0C jz short SMBus_ReadByte ; Jump if Zero (ZF=1)
BOOTBLK:573F
BOOTBLK:5741 E2 E7 loop read_loop ; Loop while CX != 0
BOOTBLK:5741
BOOTBLK:5743 66 C1 C8 10 ror eax, 10h ; Rotate Right
BOOTBLK:5747 66 0F CF bswap edi ; Swap bytes
BOOTBLK:574A F9 stc ; Set Carry Flag
BOOTBLK:574B FF E7 jmp di ; Indirect Near Jump
BOOTBLK:574B
BOOTBLK:574B SMBus_ReadBlock endp
BOOTBLK:574B
BOOTBLK:574D
BOOTBLK:574D ; =============== S U B R O U T I N E =======================================
BOOTBLK:574D
BOOTBLK:574D
BOOTBLK:574D SMBus_ReadByte proc near ; CODE XREF: SMBus_ReadBlock+1Fj
BOOTBLK:574D B8 D3 04 mov ax, 4D3h ; reg = 0x4; // XMIT_SLVA - Transmit Slave Address
BOOTBLK:574D ; value = 0xD3;
BOOTBLK:5750 BF 55 57 mov di, offset SMB_Send_CMD
BOOTBLK:5753 EB 31 jmp short SMBus_io_write_SL ; Jump
BOOTBLK:5753
BOOTBLK:5755 ; ---------------------------------------------------------------------------
BOOTBLK:5755
BOOTBLK:5755 SMB_Send_CMD: ; DATA XREF: SMBus_ReadByte+3o
BOOTBLK:5755 66 C1 C0 08 rol eax, 8 ; Rotate Left
BOOTBLK:5759 0C 80 or al, 80h ; Logical Inclusive OR
BOOTBLK:575B B4 03 mov ah, 3 ; reg = 0x3; // HST_CMD - Host Command
BOOTBLK:575D BF 62 57 mov di, offset SMB_Prepare_Controller
BOOTBLK:5760 EB 24 jmp short SMBus_io_write_SL ; Jump
BOOTBLK:5760
BOOTBLK:5762 ; ---------------------------------------------------------------------------
BOOTBLK:5762
BOOTBLK:5762 SMB_Prepare_Controller: ; DATA XREF: SMBus_ReadByte+10o
BOOTBLK:5762 B8 48 02 mov ax, 248h ; reg = 0x2; // HST_CNT - Host Control
BOOTBLK:5762 ; value = 0x48;
BOOTBLK:5765 BF 6A 57 mov di, offset loc_F576A
BOOTBLK:5768 EB 1C jmp short SMBus_io_write_SL ; Jump
BOOTBLK:5768
BOOTBLK:576A ; ---------------------------------------------------------------------------
BOOTBLK:576A
BOOTBLK:576A loc_F576A: ; DATA XREF: SMBus_ReadByte+18o
BOOTBLK:576A B9 30 75 mov cx, 7530h
BOOTBLK:576A
BOOTBLK:576D
BOOTBLK:576D delay_loop: ; CODE XREF: SMBus_ReadByte+22j
BOOTBLK:576D E6 ED out 0EDh, al
BOOTBLK:576F E2 FC loop delay_loop ; Loop while CX != 0
BOOTBLK:576F
BOOTBLK:5771 B8 FF 00 mov ax, 0FFh
BOOTBLK:5774 BF 79 57 mov di, offset SMB_Read_Data
BOOTBLK:5777 EB 0D jmp short SMBus_io_write_SL ; Jump
BOOTBLK:5777
BOOTBLK:5779 ; ---------------------------------------------------------------------------
BOOTBLK:5779
BOOTBLK:5779 SMB_Read_Data: ; DATA XREF: SMBus_ReadByte+27o
BOOTBLK:5779 B4 05 mov ah, 5 ; reg = 0x5; // HST_D0 - Host Data 0
BOOTBLK:577B BF 80 57 mov di, offset return
BOOTBLK:577E EB 0E jmp short SMBus_io_read_SL ; Jump
BOOTBLK:577E
BOOTBLK:5780 ; ---------------------------------------------------------------------------
BOOTBLK:5780
BOOTBLK:5780 return: ; DATA XREF: SMBus_ReadByte+2Eo
BOOTBLK:5780 66 0F CF bswap edi ; Swap bytes
BOOTBLK:5783 F8 clc ; Clear Carry Flag
BOOTBLK:5784 FF E7 jmp di ; Indirect Near Jump
BOOTBLK:5784
BOOTBLK:5784 SMBus_ReadByte endp
BOOTBLK:5784
BOOTBLK:5786
BOOTBLK:5786 ; =============== S U B R O U T I N E =======================================
BOOTBLK:5786
BOOTBLK:5786
BOOTBLK:5786 ; void __usercall SMBus_io_write_SL(__int8 reg<ah>, __int8 value<al>)
BOOTBLK:5786 SMBus_io_write_SL proc near ; CODE XREF: SMBus_WriteBlock+10j
BOOTBLK:5786 ; SMBus_WriteByte+6j ...
BOOTBLK:5786 BA 00 04 mov dx, 400h
BOOTBLK:5789 8A D4 mov dl, ah
BOOTBLK:578B EE out dx, al
BOOTBLK:578C FF E7 jmp di ; Indirect Near Jump
BOOTBLK:578C
BOOTBLK:578C SMBus_io_write_SL endp
BOOTBLK:578C
BOOTBLK:578E
BOOTBLK:578E ; =============== S U B R O U T I N E =======================================
BOOTBLK:578E
BOOTBLK:578E
BOOTBLK:578E ; __int8 __usercall SMBus_io_read_SL<al>(__int8 reg<ah>)
BOOTBLK:578E SMBus_io_read_SL proc near ; CODE XREF: SMBus_WriteBlock+1Aj
BOOTBLK:578E ; SMBus_ReadBlock+19j ...
BOOTBLK:578E BA 00 04 mov dx, 400h
BOOTBLK:5791 8A D4 mov dl, ah
BOOTBLK:5793 EC in al, dx
BOOTBLK:5794 FF E7 jmp di ; Indirect Near Jump
BOOTBLK:5794
BOOTBLK:5794 SMBus_io_read_SL endp
BOOTBLK:5794
20 Мар 2021 - 20:51 Unnovn BIOS хэ86_64
? Эм, а есть ли готовая прога(типа i2ctools для *никс, но под винду) чтоб записань нужные байты в смбас (конкретно в spd eeprom dram-модуля) amd чипсет(880).
П.С. Тайпхун не предлагать, чегото афтар злой у неё
Базовый адрес портов ввода/вывода SMBus указывается в конфигурационном регистре SMB_BASE (обычно регистр по смещению 20h) контроллера SMBus (обычно в составе южного моста).
"Базовый адрес портов ввода/вывода SMBus указывается ..." - или смотрится в ACPI таблицах
One more example:
Asrock P4i65gv, AMIBIOS, Intel i865
? Эм, а есть ли готовая прога(типа i2ctools для *никс, но под винду) чтоб записань нужные байты в смбас (конкретно в spd eeprom dram-модуля) amd чипсет(880).
П.С. Тайпхун не предлагать, чегото афтар злой у неё
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